POWER AWARE ARCHITECTURES AND PARALLEL I/O SYSTEMS

6 June, 2016

Título:POWER AWARE ARCHITECTURES AND PARALLEL I/O SYSTEMS
Prof. Alok Choudhary
Department of Electrical Computing Engineering
Nothwestern University
Chicago, EE.UU.
Fecha impartición: 17 y 18 de marzo de 2003.
Horario: de 15 a 20 horas.
Duración: 10 horas.
Aula: 20D14 horas.
Lugar: Escuela Politécnica Superior Universidad Carlos III. Leganés, Madrid

Material del seminario:

alok-2003.zip

Abstract of the course:

This seminar shos the new trends in high performance computing, including two important new fields: power aware architectures and parallel I/O systems.

Topics:

*Part I. Power Aware Architectures:

1.Power aware Architctures.
2.Power Aware memory Hierarchies.
3.Power Aware Compilation and Optimizations.
4.Synthesis and compilation for Heterogeneous SoC systems
5.Power Aware parallelization for Embedded Systems.

*Part II: Parallel I/O Systems and Trends.

1.Smart-Disk based Storage Archietctures
2.Clusters of Smart-Disk Systems
3.Software structures for Smart Disk based Systems.
4.Parallel File Systems for Clusters
5.Optimizing Parallel I/O for large-scale systems including MPI-IO
6.Scientific Data Management

Short biography of the autor:

Prof. Alok Choudhary got his Ph.D. at the University of Illinois, Urbana-Champaign, in 989. He is currently a full Professor, ECE Department in the Northwestern University, Chicago, USA. He has got several awards, including the NSF Young Investigator Award, in 1993, the IBM Faculty Development Award, in 1994, the Intel Faculty Research Award, in 1993, and the IEEE Engineering Foundation Award, in 1990. His research interest includes compilers and Runtime Systems for High-Performance, embedded and adaptive computing systems and power-aware systems, High-Performance Databases, OLAP and datamining and Parallel and distributed Input-Output for Scientific and Information Processing Applications.